The present application relates to a memory device including a memory layer storing the magnetization-state of a magnetic body as information, and a fixed-magnetization layer having a fixed-magnetization direction, where the magnetization direction of the memory layer is changed by passing an electric current through the memory layer. The preset application also relates to a memory including such a memory device. The memory device and memory can be suitably applied to a nonvolatile memory.
Information and telecommunication apparatuses, particularly personal small apparatuses, such as personal digital assistances (PDAs), have widely and increasingly been used among consumers. Along with this popularity, enhanced performance, such as higher integration, increased processing speed, and lower consumption of power have been demanded for devices employed in such apparatuses, such as memory and logic devices.
In particular, nonvolatile memories are considered as significant components for enhancement of the performance in such apparatuses.
The nonvolatile memories practically used in the related arts include semiconductor flash memories and ferroelectric nonvolatile memories (Fe-RAMs). These memories have been actively researched and developed for achieving higher performance.
Recently, magnetic random access memories (MRAMs) as nonvolatile memories utilizing tunnel magnetoresistance effects have been disclosed and attracted much attention (e.g., J. Nahas et al., IEEE/ISSCC 2004 Visulas Supplement, p. 22).
The MRAM has a structure having wiring lines, such as a word line and a bit line to regularly arrange minute memory devices for carrying out information-recording and accessing each of the devices. The magnetic memory devices each include a memory layer for recording information as a magnetization direction of a strong magnetic body.
Furthermore, the configuration of the magnetic memory device employs a so-called magnetic tunnel junction (MTJ) structure, which includes the memory layer as described above, a tunnel insulting layer (non-magnetic spacer layer), and a fixed-magnetization layer having a fixed-magnetization direction. The magnetization direction of the fixed-magnetization layer can he fixed by, for example, including a ferromagnetic layer.
The resistance to the tunnel current passing through the tunnel-insulating film change depending on the angle formed by the magnetization direction of the memory layer and the magnetic direction of the fixed-magnetization layer; that is, a so-called tunnel magnetoresistance effect. Accordingly, the information can be written (recorded) using this tunnel magnetoresistance effect. The magnitude of the resistance achieves the maximum when the magnetization direction of memory layer and the magnetization direction of fixed-magnetization layer are not parallel. In contrast, the magnitude of the resistance achieves the minimum when they are in parallel with each other.
In the case of the magnetic memory device formed in this manner, the writing (recording) of information on the magnetic memory device can be carried out by controlling the magnetization direction of the memory layer of the magnetic memory device using synthesis current magnetic field generated on both a word line and a bit line. In general, the different magnetization directions (magnetization-states) are recorded corresponding to information “0” and information “1”, respectively.
Furthermore, there is disclosed a method for carrying out the recording (writing) of information on the memory device that utilizes asteroid characteristics (e.g., Japanese Unexamined Patent Application Publication No. 10-116490), or a method using switching characteristics (e.g., U.S. Patent Application No. 2003 0072174 A1).
On the other hand, the recorded information is read out as follows. A memory cell is selected using an element such as a transistor and the tunnel magnetoresistance effect of the magnetic memory device is then used to detect a difference between magnetization directions of the memory layer as a difference in voltage signals, thereby detecting the recorded signal.
When this MRAM is compared with any of other nonvolatile memories, the most significant feature of the MRAM is that the information can be rewritten on the MRAM at a high speed and almost infinitely (>1015 times) because the rewriting of information “0” and information “1” are conducted by reversing the magnetization direction of the memory layer formed of a strong magnetic body.
However, it is preferable to generate a comparatively large current magnetic field in order to rewrite the recorded information in MRAM. A large amount of current (for example, several mA to several tens mA) can be passed through an address line. Thus, power consumption may largely increase.
In addition, the MRAM generally includes both an address line for writing and an address line for reading are respectively required. Thus, it may be difficult to structurally reduce the size of the memory cells.
Furthermore, the reduction in the size of the device may cause some drawbacks; that is, since the address line is thinned, it may be difficult to pass through a sufficient electric current via the address line. In addition, since coercive force increases, current magnetic field may also increase, thereby increasing power consumption.
Therefore, it may be difficult to reduce the size of the device.
However, there are disclosed studies for the structures of recording without using a current magnetic field. Among them, as a study on a memory capable of flux reversal with less current, attentions have been paid on a memory configured to use flux reversal with spin transfer (e.g., U.S. Pat. No. 5,695,864).
The flux reversal with spin transfer indicates that an electron being spin-polarized by passing through a magnetic body is injected into another unfixed-magnetic body to cause flux reversal in the latter magnetic body (e.g., Japanese Unexamined Patent Application Publication No. 2003-17782).
In other words, a spin-polarized electron passed through a magnetic layer (fixed-magnetization layer) with a fixed-magnetization direction is a phenomenon to provide the magnetization of the magnetic layer with a torque when the magnetization direction enters into unfixed-magnetic layer (free magnetization layer) with unfixed-magnetization direction. In addition, passing current through the magnetic layer at a certain threshold or more can reverse the magnetization direction of the magnetic layer (free magnetization layer).
For instance, a giant magnetoresistance effect element (GMR element) or a magnetic tunnel junction element (MTJ element) having a fixed-magnetization layer and a free magnetization layer includes passing an electric current in the direction perpendicular to the film surface of the GMR or MTJ element. As a result, the magnetization direction of at least part of the magnetic layer of the element can be reversed.
In this way, a memory device having a fixed-magnetization layer and a free magnetization layer (memory layer) is formed and the polarity of passage of an electric current through the memory device is then changed to reverse the magnetization direction of the memory layer, thereby rewriting the information “0” and the information “1”.
The recorded information can be read out utilizing the tunnel magnetoresistance effect in a manner similar to MRAM by installing a tunnel-insulating layer between the fixed-magnetization layer and the free magnetization layer (memory layer).
Furthermore, the flux reversal with spin transfer has an advantage in that flux reversal can be realized without an increase in electric current.
The absolute value of an electric current, passing through a memory device for flux reversal is 1 mA or less when the memory device is, for example, about 0.1 μm in size. Besides, it is advantageous that an absolute value decrease in proportion to a decrease in volume of the memory device.
Furthermore, there is another advantage in that the configuration of a memory cell can be simplified due to elimination of a recording word line that is necessary in MRA.
Hereinafter, a memory device utilizing a spin transfer will be referred to as a spin transfer random access memory (Sp-RAM). In addition, a spin-polarized current for causing spin transfer will be referred to as a spin injection current.
The Sp-RAM has been greatly expected to be a nonvolatile memory enabling to realize low power consumption and include large storage capacity while maintaining the advantages of MRAM where high-speed performance is obtained and the number of rewritings is almost infinite.
FIG. 1 is a schematic cross sectional diagram of a memory cell of the related-art memory (Sp-RAM) using spin transfer.
For electrically reading out the information stored in the memory cell, a diode, a MOS transistor, or the like may be used. In the memory cell shown in FIG. 1, a MOS transistor is used.
First, the configuration of a memory device 101 forming a memory cell in Sp-RAM will be described.
A ferromagnetic layer 112 and a ferromagnetic layer 114 are linked by an anti-ferromagnetic coupling and arranged through a non-magnetic layer 113. The ferromagnetic layer 112 on the under layer side is arranged contiguous to the ferromagnetic layer 111. An exchange interaction effecting on between these layers has strong unidirectional magnetic anisotropy. Thus, the fixed-magnetization layer 102 includes these four layers 111, 112, 113, 114. In other words, the fixed-magnetization layer 102 includes two ferromagnetic layers 112, 114.
The ferromagnetic layer 116 is formed so that direction of the magnetization M1 may comparatively easily rotate. The memory layer (free magnetization layer) 103 is formed with this ferromagnetic layer 116.
A tunnel-insulating layer 115 is formed between the ferromagnetic layer 114 of the fixed-magnetization layer 102 and the ferromagnetic layer 116, i.e., between the fixed-magnetization layer 102 and the memory layer (free magnetization layer) 103. The tunnel-insulating layer 115 breaks the magnetic coupling between a magnetic layer 116 and a magnetic layer 114 arranged in vertical direction while involving passing a tunnel electric current therethrough. Accordingly, a tunnel magnetoresistance element (TMR) element includes the fixed-magnetization layer 102 with a fixed-magnetization direction of the magnetic layer, the tunnel-insulating layer 115, and the memory layer (free magnetization layer) 103 that may change the magnetization direction.
Furthermore, the above respective layers 111 to 116, a base layer 110, and a top-coating layer 117 form a memory device 101 including a TMR element.
Furthermore, a selection MOS transistor 121 is formed on a silicon substrate 120. A connection plug 107 is formed on one dispersion layer 123 of the selection MOS transistor 121. The base layer 110 of the memory device 101 is connected to the connection plug 107. The base layer 110 of the memory device 101 is connected to the connection plug 107. The other dispersion layer 122 of the selection MOS transistor 121 is connected to a sense line (not shown) through the connection plug 107. A gate 106 is connected to a selection signal line (not shown).
The top-coating layer 117 of the memory device 101 is connected to a bit line (BL) 105 arranged thereon.
In a static state, the magnetization M11 of the ferromagnetic layer 112 and the magnetization M12 of the ferromagnetic layer 114 are almost completely in anti-parallel state by a strong anti-ferromagnetic coupling through the non-magnetic layer 113.
In general, the ferromagnetic layer 112 and ferromagnetic layer 114 have the same saturated magnetization film thickness product. Thus, a leaked component of a magnetic-pole magnetic field is small enough to ignore.
The resistance value of TMR element formed of these layers 114, 115, 116 varies depending on whether the direction of the magnetization M1 of the ferromagnetic layer 116 in the memory layer 103 and the magnetization M12 of the ferromagnetic layer 114 in the fixed-magnetization layer 102 are in a parallel state or in anti-parallel state through a tunnel-insulating layer 115. The resistance value is low when two magnetizations M1. M12 are in a parallel state, while the resistance value is high in anti-parallel state. The resistance of the whole memory device 101 changes as the resistance of the TMR element (114, 115, 116) changes. This factor can be used in the recording of information and the reading-out of the recorded information. In other words, for example, the information “0” may be assigned in the state of low resistance value and the information “1” is assigned in the sate of high resistance value. Thus, the information of two values (one bit) can be recorded.
Notice that among layers forming the fixed-magnetization layer 102, a ferromagnetic layer 114 on the side of the memory layer 103 is a ferromagnetic layer referenced and provided as a reference of the direction of magnetization M1 of the memory layer 103 when the recorded information is read out. Thus, the ferromagnetic layer 114 is also called as a reference layer.
For rewriting the information in the memory cell or reading the information out of the memory cell, a spin-polarized current Iz may be passed through the memory cell. The spin-polarized current Iz passes through the memory device 101, the dispersion layer 123, and the bit line 105.
The spin-polarized current Iz can be changed from the upward to the downward or from the downward to the upward by changing the polarity of the spin-polarized current Iz.
Consequently, the information in the memory cell can be rewritten by changing the direction of the magnetization M1 of the memory layer 103 of the memory device 101.
However, for reversing the magnetization of the memory layer of the memory device, not only does a spin-injection electric current pass through the memory device, but Sp-RAM also applies a bias-current magnetic field on a memory layer in addition to the memory device (e.g., Japanese Unexamined Patent Application Publication No. 2005-277147).
Specifically, in the configuration of the memory cell shown in FIG. 1, a spin-polarized current Iz is introduced into the memory device 101 through the bit line 105. In addition, a bias-current magnetic field Hx (not shown) generated by the electric current passing through the bit line 105 (equal to the spin-polarized current Iz) is applied on the memory layer 103 of the memory device 101.
Consequently, the direction of the magnetization M1 of the memory layer 103 can be efficiently changed.